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| 型号： | LTC3549EDCB#TRMPBF |
| 厂商： | Linear Technology |
| 文件页数： | 3/16页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 0.25A 6DFN |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.61 V ~ 5.5 V |
| 输入电压： | 1.6 V ~ 5.5 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 2.25MHz |
| 电流 - 输出： | 250mA |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-WFDFN 裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 6-DFN-EP（2x3） |
| 产品目录页面： | 1335 (CN2011-ZH PDF) |
| 其它名称： | LTC3549EDCB#TRMPBFDKR |
LTC3549
ELECTRICAL CHARACTERISTICS The ● denotes the speci?cations which apply over the full operating
temperature range, otherwise speci?cations are at T A = 25°C, V IN = 2.2V.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I S
Input DC Bias Current
(Note 5)
Active Mode
Sleep Mode
Shutdown
V OUT = 90%, I LOAD = 0A
V OUT = 103%, I LOAD = 0A
V RUN = 0V, V IN = 5.5V
300
50
0.1
475
95
5
μA
μA
μA
f OSC
t SS
R PFET
Nominal Oscillator Frequency
Soft-Start Period
R DS(ON) of P-Channel FET
RUN ↑
I SW = 100mA, Wafer Level
●
1.8
2.25
1
0.5
2.7
MHz
ms
Ω
I SW = 100mA, DD Package (Note 7)
0.56
Ω
R NFET
R DS(ON) of N-Channel FET
I SW = 100mA, Wafer Level
I SW = 100mA, DD Package (Note 7)
0.35
0.4
Ω
Ω
I LSW
SW Leakage
V RUN = 0V, V SW = 0V or 5.5V, V IN = 5.5V
±0.1
±1
μA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime. Voltage on any pin may not exceed 6V.
Note 2: The LTC3549E is guaranteed to meet performance speci?cations
from 0°C to 85°C. Speci?cations over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: T J is calculated from the ambient temperature T A and power
dissipation P D according to the following formula:
becomes active at a junction temperature greater than the maximum
operating junction temperature. Continuous operation above the speci?ed
maximum operating junction temperature may impair device reliability.
Note 4: The LTC3549 is tested in a proprietary test mode that connects V FB
to the output of the error ampli?er.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 6: Δ V OVL is the amount V FB must exceed the regulated feedback
voltage.
Note 7: Determined by design, not production tested.
LTC3549: T J = T A + (P D )(64°C/W)
This IC includes overtemperature protection that is intended to protect the
device during momentary overload conditions. Overtemperature protection
3549f
3
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