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| 型号： | LTC1751EMS8-3.3 |
| 厂商： | Linear Technology |
| 文件页数： | 10/12页 |
| 文件大小： | 0K |
| 描述： | IC REG SWITCHED CAP DBL 8MSOP |
| 标准包装： | 50 |
| 类型： | 切换式电容器（充电泵），倍增器 |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 3.3V |
| 输入电压： | 2.5 V ~ 5.5 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 800kHz |
| 电流 - 输出： | 125mA |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 包装： | 管件 |
| 供应商设备封装： | 8-MSOP |
| 产品目录页面： | 1339 (CN2011-ZH PDF) |
LTC1751/LTC1751-3.3/LTC1751-5
APPLICATIO S I FOR ATIO
Programming the LTC1751 Output Voltage (FB Pin)
While the LTC1751-3.3/LTC1751-5 versions have internal
Typical R OUT values as a function of input voltage are
shown in Figure 5.
resistive dividers to program the output voltage, the
programmable LTC1751 may be set to an arbitrary voltage
10
T A = 25 ° C
C FLY = 1 μ F
via an external resistive divider. Since it employs a voltage
doubling charge pump, it is not possible to achieve output
8
I OUT = 100mA
voltages greater than twice the available input voltage.
Figure 3 shows the required voltage divider connection.
6
4
I OUT = 50mA
The voltage divider ratio is given by the expression:
2
=
R 1 V OUT
R 2 1 . 205 V
– 1
0
2.0
2.5
3.0
3.5
4.0
4.5
INPUT VOLTAGE (V)
( )
V OUT
FB
GND
2
1
4
R1
R2
V OUT
1.205V 1 + R1
R2
C OUT
1751 F05
Figure 5. Typical R OUT vs Input Voltage
Layout Considerations
Due to high switching frequency and high transient cur-
1751 F03
Figure 3. Programming the Adjustable LTC1751
The sum of the voltage divider resistors can be made large
to keep the quiescent current to a minimum. Any standing
current in the output divider (given by 1.205V/R2) will be
reflected by a factor of 2 in the input current. Typical values
for total voltage divider resistance can range from several
k ? s up to 1M ? .
Maximum Available Output Current
For the adjustable LTC1751, the maximum available out-
put current and voltage can be calculated from the effec-
tive open-loop output resistance, R OUT , and effective
output voltage, 2V IN(MIN) .
From Figure 4 the available current is given by:
rents produced by the LTC1751 product family, careful
board layout is necessary. A true ground plane and short
connections to all capacitors will improve performance and
ensure proper regulation under all conditions. Figure 6
shows the recommended layout configuration.
Thermal Management
For higher input voltages and maximum output current,
there can be substantial power dissipation in the
LTC1751. If the junction temperature increases above
approximately 160 ° C, the thermal shutdown circuitry
will automatically deactivate the output. To reduce the
maximum junction temperature, a good thermal connec-
tion to the PC board is recommended. Connecting the
GND pin (Pin 4) to a ground plane, and maintaining a
solid ground plane under the device on two layers of the
PC board, will reduce the thermal resistance of the
I OUT =
2 V IN – V OUT
R OUT
package and PC board system considerably.
V IN
–
+
R OUT
2V IN
+
V OUT
V OUT
SHDN
–
10
1751 F04
Figure 4. Equivalent Open-Loop Circuit
GND
Figure 6. Recommended Layout
17515 F03
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