参数资料
型号: LTC1703IG
厂商: Linear Technology
文件页数: 21/36页
文件大小: 0K
描述: IC REG SW DL SYNC W/VID 28-SSOP
标准包装: 47
应用: 控制器,移动式 Intel Pentium? III
输入电压: 3 V ~ 7 V
输出数: 2
输出电压: 0.9 V ~ 2 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
供应商设备封装: 28-SSOP
包装: 管件
LTC1703
APPLICATIO S I FOR ATIO
FEEDBACK LOOP/COMPENSATION 1
Feedback Loop Types
In a typical LTC1703 circuit, the feedback loop consists of
the modulator, the external inductor and output capacitor,
and the feedback amplifier and its compensation network.
All of these components affect loop behavior and need to
be accounted for in the loop compensation. The modulator
consists of the internal PWM generator, the output MOSFET
drivers and the external MOSFETs themselves. From a
feedback loop point of view, it looks like a linear voltage
transfer function from COMP to SW and has a gain roughly
equal to the input voltage. It has fairly benign AC behavior
at typical loop compensation frequencies with significant
chosen based on the regulation and load current require-
ments without considering the AC loop response. The
feedback amplifier, on the other hand, gives us a handle
with which to adjust the AC response. The goal is to have
180 ° phase shift at DC (so the loop regulates) and some-
thing less than 360 ° phase shift at the point that the loop
gain falls to 0dB. The simplest strategy is to set up the
feedback amplifier as an inverting integrator, with the 0dB
frequency lower than the LC pole (Figure 9). This “type 1”
configuration is stable but transient response will be less
than exceptional if the LC pole is at a low frequency.
C1
phase shift appearing at half the switching frequency.
The external inductor/output capacitor combination makes
IN
R1
R B
+
OUT
V REF
a more significant contribution to loop behavior. These
components cause a second order LC roll-off at the output,
with the attendant 180 ° phase shift. This roll-off is what
filters the PWM waveform, resulting in the desired DC
output voltage, but the phase shift complicates the loop
1703 F09a
Figure 9a. Type 1 Amplifier Schematic Diagram
compensation if the gain is still higher than unity at the pole
frequency. Eventually (usually well above the LC pole
GAIN
(dB)
PHASE
(DEG)
frequency), the reactance of the output capacitor will
approach its ESR, and the roll-off due to the capacitor will
stop, leaving 6dB/octave and 90 ° of phase shift (Figure 8).
0
GAIN
0
So far, the AC response of the loop is pretty well out of the
user’s control. The modulator is a fundamental piece of the
–6dB/OCT
–90
LTC1703 design, and the external L and C are usually
–180
GAIN
(dB)
A V
GAIN
PHASE
(DEG)
PHASE
–270
1703 F09b
0
–12dB/OCT
0
Figure 9b. Type 1 Amplifier Transfer Function
PHASE
–6dB/OCT
–90
–180
Figure 10 shows an improved “type 2” circuit that uses an
additional pole-zero pair to temporarily remove 90 ° of
phase shift. This allows the loop to remain stable with 90 °
more phase shift in the LC section, provided the loop
reaches 0dB gain near the center of the phase “bump.”
Type 2 loops work well in systems where the ESR zero in
1703 F08
1 The information in this section is based on the paper “The K Factor: A New Mathematical Tool for
Figure 8. Transfer Function of Buck Modulator
Stability Analysis and Synthesis” by H. Dean Venable, Venable Industries, Inc. For complete paper,
see “Reference Reading #4” at www.linear-tech.com.
1703fa
21
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