参数资料
型号: LT3682IDD#PBF
厂商: Linear Technology
文件页数: 20/24页
文件大小: 0K
描述: IC REG BUCK ADJ 1A 12DFN
标准包装: 121
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 20 V
输入电压: 3.6 V ~ 36 V
PWM 型: 电流模式,混合
频率 - 开关: 250kHz ~ 2.2MHz
电流 - 输出: 1A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 12-WFDFN 裸露焊盘
包装: 管件
供应商设备封装: 12-DFN
LT3682
APPLICATIONS INFORMATION
Synchronization
To select Low Ripple Burst Mode operation, tie the SYNC
pin below 0.3V (this can be ground or a logic output).
Synchronizing the LT3682 oscillator to an external
frequency can be done by connecting a square wave (with
20% to 80% duty cycle) to the SYNC pin. The square wave
amplitude should have valleys that are below 0.3V and
peaks that are above 0.8V (up to 6V).
The LT3682 will not enter Burst Mode at low output loads
while synchronized to an external clock, but instead will
skip pulses to maintain regulation.
The maximum load current that the part can supply is
reduced when a clock signal is applied to SYNC.
The LT3682 may be synchronized over a 300kHz to 2.2MHz
range. The R T resistor should be chosen to set the LT3682
switching frequency 20% below the lowest synchronization
input. For example, if the synchronization signal will be
360kHz, the R T should be chosen for 300kHz. To assure
reliable and safe operation the LT3682 will only synchronize
when the output voltage is near regulation as indicated
by the PG ?ag. It is therefore necessary to choose a large
enough inductor value to supply the required output current
at the frequency set by the R T resistor. See the Inductor
Selection section for more information. It is also important
to note that slope compensation is set by the R T value:
to avoid subharmonics, calculate the minimum inductor
value using the frequency determined by R T .
Shorted and Reversed Input Protection
If the inductor is chosen so that it won’t saturate excessively,
the LT3682 will tolerate a shorted output. When operating
in short-circuit condition, the LT3682 will reduce its
frequency until the valley current is at a typical value of
1.6A (see Figure 8). There is another situation to consider
in systems where the output will be held high when the
input to the LT3682 is absent. This may occur in battery
charging applications or in battery backup systems where
a battery or some other supply is diode OR-ed with the
LT3682’s output. If the V IN pin is allowed to ?oat and the
RUN/SS pin is held high (either by a logic signal or because
it is tied to V IN ), then the LT3682’s internal circuitry will
pull its quiescent current through its SW pin. This is ?ne
if your system can tolerate a few mA in this state. If you
ground the RUN/SS pin, the SW pin current will drop to
essentially zero. However, if the V IN pin is grounded while
the output is held high, then parasitic diodes inside the
LT3682 can pull large currents from the output through
the SW pin and the V IN pin. Figure 9 shows a circuit that
will run only when the input voltage is present and that
protects against a shorted or reversed input.
D4
MBRS140
BD
V IN
V IN
BOOST
V SW
20V/DIV
0V
LT3682
RUN/SS
SW
V OUT
I L
500mA/DIV
V C
DA
GND PGND FB
BACKUP
0A
2μs/DIV
3682 F08
3682 F09
Figure 8. The LT3682 Reduces its Frequency to
Protect Against Shorted Output with 36V Input
Figure 9. Diode D4 Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output.
It Also Protects the Circuit from a Reversed Input.
The LT3682 Runs Only When the Input is Present
3682f
20
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