参数资料
型号: LT3513IUHF#TRPBF
厂商: Linear Technology
文件页数: 11/22页
文件大小: 0K
描述: IC REG 5-OUT FOR TFT-LCD 38QFN
标准包装: 2,500
应用: 转换器,TFT,LCD
输入电压: 4.5 V ~ 30 V
输出数: 5
输出电压: 0.8 V ~ 40 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 38-WFQFN 裸露焊盘
供应商设备封装: 38-QFN(5x7)
包装: 带卷 (TR)
LT3513
OPERATION
5ms/DIV
5ms/DIV
The LT3513 is a highly integrated power supply IC contain-
ing four separate switching regulators and a low dropout
linear regulator (LDO). Switching regulator 1 is a step-
down 2.2A regulator with inductor current sense and an
integrated boost Schottky diode. Switching regulator 2 can
be configured as a step-up or SEPIC converter and has a
1.5A switch. Switching regulator 3 consists of a step-up
regulator with a 0.25A switch as well as an integrated
Schottky diode. Switching regulator 4 is a negative regula-
tor with a switch current limit of 0.25A and an integrated
Schottky diode. Linear regulator 5 is capable of providing
8mA of current to the base of an external NPN transistor.
The regulators share common circuitry including input
source, voltage reference and master oscillator. Operation
can be best understood by referring to the Block Diagram
as shown in Figure 1.
If the RUN-SS1 pin is pulled to ground, the LT3513 is shut
down and draws 30μA from the input source tied to V IN .
An internal 2μA current source charges the external soft-
start capacitor, generating a voltage ramp at this pin. If the
RUN-SS1 pin exceeds 0.8V, the internal bias circuits turn
on, including the internal regulator, reference and 2MHz
master oscillator. The master oscillator generates four
clock signals, one for each of the switching regulators.
Switching regulator 1 will only begin to operate when the
RUN-SS1 pin reaches 0.8V. Switcher 1 generates V LOGIC ,
which must be tied to the BIAS pin. When BIAS reaches 2.8V,
the NPNs pulling down on the RUN-SS2 and RUN-SS3/4
pins turns off, allowing an internal 2μA current source
to charge the external capacitors tied to RUN-SS2 and
RUN-SS3/4 pins. When the voltage on RUN-SS2 reaches
0.8V, switcher 2 is enabled. Correspondingly, when the
voltage on RUN-SS3/4 reaches 0.8V, switchers 3 and 4
are enabled. AV DD , E3 and V OFF will then begin rising at a
rate determined by the capacitors tied to the RUN-SS2 and
RUN-SS3/4 pins. When all four switching outputs reach
90% of their programmed voltages, the NPN pulling down
on the C T pin will turn off, and an internal 20μA current
source will charge the external capacitor tied to the C T pin.
When the C T pin reaches 1.1V, the output disconnect PNP
turns on, connecting V ON to E3. In the event of any of the
four outputs dropping below 90% of their programmed
voltage, PanelProtect circuitry pulls the C T pin to GND,
disabling V ON .
RUN-SS 2V/DIV
V LOGIC 5V/DIV
I L1 1A/DIV
SS-234 2V/DIV
AV DD 10V/DIV
I L2 500μA/DIV
PGOOD 20V/DIV
3513 F02a
(2a)
V SS3/4 2V/DIV
V OFF 10V/DIV
I L4 500mA/DIV
V E3 20V/DIV
I L3 500mA/DIV
V CT 2V/DIV
V ON 20V/DIV
3513 F02b
(2b)
Figure 2. LT3513 Power-Up Sequence. (Traces from Both Photos
are Synchnonized to the Same Trigger)
3513fc
11
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