参数资料
型号: ISL6217CV
厂商: Intersil
文件页数: 19/19页
文件大小: 0K
描述: IC CTRLR PWM INTEL PENT 38-TSSOP
标准包装: 50
应用: 控制器,Intel Pentium? IMVP-IV,IMVP+
输入电压: 5.5 V ~ 25 V
输出数: 1
工作温度: -10°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 38-TFSOP(0.173",4.40mm 宽)
供应商设备封装: 38-TSSOP
包装: 管件
ISL6217
Thin Shrink Small Outline Plastic
Packages (TSSOP)
N
M38.173
38 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-153-BD-1 ISSUE F)
INDEX
AREA
E1
-B-
E
0.25(0.010) M
GAUGE
PLANE
B M
SYMBOL
A
INCHES
MIN MAX
- 0.047
MILLIMETERS
MIN MAX
- 1.20
NOTES
-
1
2
3
A1
0.002
0.006
0.05
0.15
-
-A-
0.05(0.002)
D
SEATING PLANE
A
0.25
0.010
L
A2
b
c
0.031
0.0075
0.0035
0.051
0.0106
0.0079
0.80
0.17
0.09
1.05
0.27
0.20
-
9
-
-C-
e
b
0.10(0.004) M C A M B S
A1
α
0.10(0.004)
A2
c
D
E1
e
E
L
0.378 0.386
0.169 0.177
0.0197 BSC
0.246 0.256
0.0177 0.0295
9.60 9.80
4.30 4.50
0.500 BSC
6.25 6.50
0.45 0.75
3
4
-
-
6
NOTES:
N
38
38
7
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-BD-1, Issue F.
2. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
α
0
o
8
o
0
o
8
o
-
Rev. 01/03
3. Dimension “D” does not include mold flash, protrusions or gate burrs
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions. Inter
lead flash and protrusions shall not exceed 0.15mm (0.006 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual inde
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable damba
protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimen
sion at maximum material condition. Minimum space between protru
sion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact. (Angles in degrees)
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the
reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by
Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
19
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