参数资料
型号: EP4SGX230HF35C3
厂商: Altera
文件页数: 33/82页
文件大小: 0K
描述: IC STRATIX IV GX 230K 1152-FBGA
产品培训模块: Stratix IV FPGAs
Three Reasons to Use FPGA's in Industrial Designs
标准包装: 3
系列: Stratix® IV GX
LAB/CLB数: 9120
逻辑元件/单元数: 228000
RAM 位总计: 17544192
输入/输出数: 564
电源电压: 0.87 V ~ 0.93 V
安装类型: 表面贴装
工作温度: 0°C ~ 85°C
封装/外壳: 1152-BBGA
供应商设备封装: 1152-FBGA(27x27)
配用: 544-2594-ND - KIT DEVELOPMENT STRATIX IV
544-2592-ND - KIT DEV STRATIX IV 4SGX230N/C2
其它名称: EP4SGX230HF35C3ES
EP4SGX230HF35C3ES-ND
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
1–31
Switching Characteristics
March 2014
Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
Inter-transceiver
block skew in Basic
(PMA Direct) ×N
mode (14)
N < 18 channels
located across
three
transceiver
blocks with the
source CMU
PLL located in
the center
transceiver
block
—
400
—
400
—
400
ps
N
18
channels
located across
four transceiver
blocks with the
source CMU
PLL located in
one of the two
center
transceiver
blocks
—
650
—
650
—
650
ps
CMU PLL0 and CMU PLL1
Supported data
range
—
600
—
11300
600
—
10312.5
600
—
8500
Mbps
CMU PLL lock time
from
pll_powerdown
de-assertion
—
100
—
100
—
100
s
ATX PLL (6G)
Supported Data
Range
/L = 1
4800-5400 and
6000-6500
4800-5400 and
6000-6500
4800-5400 and
6000-6500
Mbps
/L = 2
2400-2700 and
3000-3250
2400-2700 and
3000-3250
2400-2700 and
3000-3250
Mbps
/L = 4
1200-1350 and
1500-1625
1200-1350 and
1500-1625
1200-1350 and
1500-1625
Mbps
ATX PLL (10G)
Supported Data
Range
—
9900
—
11300
9900
—
10312.5
—
Mbps
Transceiver-FPGA Fabric Interface
Interface speed
(non-PMA Direct)
—
25
—
325
25
—
325
25
—
265.625
MHz
Interface speed
(PMA Direct)
—
50
—
325
50
—
325
50
—
325
MHz
Table 1–24. Transceiver Specifications for Stratix IV GT Devices (Part 7 of 8)
Symbol/
Description
Conditions
–1 Industrial Speed
Grade
–2 Industrial Speed
Grade
–3 Industrial Speed
Grade
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
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