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参数资料
| 型号： | CAT1163LI42 |
| 厂商： | ON Semiconductor |
| 文件页数： | 4/12页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR CPU W/EEPROM 8-DIP |
| 标准包装： | 50 |
| 类型： | 简单复位/加电复位 |
| 监视电压数目： | 1 |
| 输出： | 开路漏极或开路集电极 |
| 复位： | 高有效/低有效 |
| 复位超时： | 最小为 130 ms |
| 电压 - 阀值： | 4.25V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 8-PDIP |
| 包装： | 管件 |
| 产品目录页面： | 806 (CN2011-ZH PDF) |
| 其它名称： | CAT1163LI-42 CAT1163LI-42-ND |
CAT1163
Table 6. AC CHARACTERISTICS
V CC = 2.7 V to 6.0 V unless otherwise specified. Output Load is TTL Gate and 100 pF.
V CC = 2.7 V ? 6 V
V CC = 4.5 V ? 5.5 V
Symbol
Parameter
Min
Max
Min
Max
Units
F SCL
T 1 (Note 1)
t AA
t BUF (Note 1)
t HD; STA
t LOW
t HIGH
t SU; STA
t HD; DAT
t SU; DAT
t R (Note 1)
t F (Note 1)
t SU; STO
t DH
Clock Frequency
Noise Suppression Time Constant at SCL, SDA Inputs
SCL Low to SDA Data Out and ACK Out
Time the Bus must be Free Before a New Transmission Can Start
Start Condition Hold Time
Clock Low Period
Clock High Period
Start Condition Setup Time (for a Repeated Start Condition)
Data in Hold Time
Data in Setup Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Condition Setup Time
Data Out Hold Time
4.7
4
4.7
4
4.7
0
50
4
100
100
200
3.5
1
300
1.2
0.6
1.2
0.6
0.6
0
50
0.6
100
400
200
1
0.3
300
kHz
ns
m s
m s
m s
m s
m s
m s
ns
ns
m s
ns
m s
ns
1. This parameter is tested initially and after a design or process change that affects the parameter.
Table 7. POWER ? UP TIMING (Notes 1 and 2)
Symbol
t PUR
t PUW
Power ? up to Read Operation
Power ? up to Write Operation
Parameter
Min
Typ
Max
1
1
Units
ms
ms
2. t PUR and t PUW are the delays required from the time V CC is stable until the specific operation can be initiated.
Table 8. WRITE CYCLE LIMITS
Symbol
t WR
Write Cycle Time
Parameter
Min
Typ
Max
10
Units
ms
The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the write
cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device does not respond to its slave address.
Table 9. RESET CIRCUIT CHARACTERISTICS
Symbol
Parameter
Min
Typ
Max
Units
t GLITCH
V RT
V OLRS
V OHRS
Glitch Reject Pulse Width
Reset Threshold Hysteresis
Reset Output Low Voltage (I OLRS = 1 mA)
Reset Output High Voltage
15
V CC ? 0.75
100
0.4
ns
mV
V
V
V TH
t PURST
Reset Threshold (V CC = 5 V), (CAT1163 ? 45)
Reset Threshold (V CC = 5 V), (CAT1163 ? 42)
Reset Threshold (V CC = 3.3 V), (CAT1163 ? 30)
Reset Threshold (V CC = 3.3 V), (CAT1163 ? 28)
Reset Threshold (V CC = 3 V), (CAT1163 ? 25)
Power ? Up Reset Timeout
4.50
4.25
3.00
2.85
2.55
130
4.75
4.50
3.15
3.00
2.70
270
V
ms
t WP
t RPD
V RVALID
Watchdog Period
V TH to RESET Output Delay
RESET Output Valid
1
1.6
5
s
m s
V
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CAT1163LI-42 | 制造商:ON Semiconductor 功能描述:IC SUPERVISOR CIRCUIT 3mA 6V 8-DIP |
| CAT1163LI-42-G | 功能描述:监控电路 CPU w/16K RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| CAT1163LI45 | 功能描述:监控电路 16K I2C Memory w/WDT RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| CAT1163LI-45-G | 功能描述:监控电路 CPU w/16K RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| CAT1163P-28 | 功能描述:监控电路 16K I2C Memory w/WDT RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
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