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参数资料
| 型号： | ATICE50MEM |
| 厂商： | Atmel |
| 文件页数： | 61/73页 |
| 文件大小： | 0K |
| 描述： | ICE50 EXTENSION MEMORY CARD |
| 标准包装： | 1 |
| 附件类型： | ICE50 内存扩展卡 |
| 适用于相关产品： | 100 引脚 megaAVR 设备 |
| 产品目录页面： | 615 (CN2011-ZH PDF) |
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Trace
Table 7-2. Data Transfer Instructions (Continued)
Reg.Val
Dat.Addr
Instruction
RegFileL
RAM_EEADDR
Status
INSTA[0..15]
LDS Rd, k (1)
ST X, Rr (1)
PMem Addr [PC[A0..22]
1. Address of instruction
2. Address of address-part of
instruction
1. Address of instruction
2. Address of next instruction
1. Address of instruction
[0..7]
1. N/A
2. Value read
1. N/A
2. N/A
1. N/A
[0..22]
1. N/A
2. Address read
from (k)
1. N/A
2. Address written
to (X)
1. N/A
Dat.Val
1. N/A
2. Value read
1. N/A
2. Value written
1. N/A
Register
N/A
N/A
ST X+, Rr
2. Address of next instruction
1. Address of instruction
1. N/A
2. Address written
to (X)
1. N/A
2. Value written
1. N/A
N/A
ST - X, Rr (1)
ST Y, Rr (1)
2. Address of next instruction
1. Address of instruction
2. Address of next instruction
1. Address of instruction
2. N/A
1. N/A
2. N/A
1. N/A
2. Address written
to (X)
1. N/A
2. Address written
to (Y)
1. N/A
2. Value written
1. N/A
2. Value written
1. N/A
N/A
N/A
ST Y+, Rr
2. Address of next instruction
2. N/A
2. Address written
to (Y)
2. Value written
N/A
1. Address of instruction
1. N/A
1. N/A
1. N/A
ST - Y, Rr
STD Y+q,Rr
ST Z, Rr (1)
2. Address of next instruction
1. Address of instruction
2. Address of next instruction
1. Address of instruction
2. Address of next instruction
1. Address of instruction
2. N/A
1. N/A
2. N/A
1. N/A
2. N/A
1. N/A
2. Address written
to (Y)
1. N/A
2. Address written
to (Y+q)
1. N/A
2. Address written
to (Z)
1. N/A
2. Value written
1. N/A
2. Value written
1. N/A
2. Value written
1. N/A
N/A
N/A
N/A
ST Z+, Rr
2. Address of next instruction
2. N/A
2. Address written
to (Z)
2. Value written
N/A
1. Address of instruction
1. N/A
1. N/A
1. N/A
ST -Z, Rr
STD Z+q,Rr (1)
STS k, Rr (1)
2. Address of next instruction
1. Address of instruction
2. Address of next instruction
1. Address of instruction
2. Address of address-part of
instruction
2. N/A
1. N/A
2. N/A
1. N/A
2. N/A
2. Address written
to (Z)
1. N/A
2. Address written
to (Z+q)
1. N/A
2. Address written
to (k)
2. Value written
1. N/A
2. Value written
1. N/A
2. Value written
N/A
N/A
N/A
ICE50 User Guide
7-7
2523A–AVR–11/02
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