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| 型号： | A4491EESTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 10/16页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 2.2A TRPL 20QFN |
| 标准包装： | 9,000 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 3 |
| 输出电压： | 可调至 0.8V |
| 输入电压： | 4.5 V ~ 23 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 550kHz |
| 电流 - 输出： | 2.2A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 20-QFN（4x4） |
A4491
Triple Output Step-Down Switching Regulator
The maximum peak-to-peak ripple current, I RIPPLE , occurs at the
maximum input voltage. Therefore the duty cycle, D, should be
found under these conditions (for the VREG1 channel):
The output capacitor determines the output voltage ripple and is
used to close the control loop. To guarantee stability, the capaci-
tance has to increase as the output voltage is reduced. This is
actually reasonable from a ripple voltage point of view, as the
D(min) =
V REG1 +V f
V BB (max) +V f
.
(3)
ripple voltage is typically specified as a percentage of output
voltage.
where V f is the forward voltage drop of the recirculation diode.
The following table outlines what the minimum output capaci-
tance should be for a given output voltage:
The required inductance can be found:
Output Voltage
Minimum Output Capacitance
L (min) =
V BB (max) – V REG1
I RIPPLE
× D(min) ×
1
f SW (min)
, (4)
(V)
5
( μ F)
10
3.3
20
Note that the manufacturers inductance tolerance should also
be taken into account. This value may be as high as ±20%. The
1.8 to 2.5
<1.8
30
40
peak-to-peak current should not exceed 1 A, to avoid instability
in the innermost circuit loops due to insufficient slope compensa-
tion.
The maximum peak current can be found from to ensure that the
saturation current level of the chosen inductor is not exceeded:
Capacitance values with greater than the above values can be
used with the effect of reducing the bandwidth. This may be nec-
essary in systems that have extremely low ripple/noise require-
ments.
The output ripple is largely determined by the output capacitance
and the effects of ESR and ESL can largely be ignored assuming
I sat = I LOAD +
I RIPPLE
2
.
(5)
good layout practice is observed.
The output voltage ripple can be approximated to:
Recommended inductor manufacturers and ranges are:
? Taiyo Yuden: NR6045 series for 1.5 A outputs
V RIPPLE ≈
I RIPPLE
8 × f SW × C OUT
,
(6)
? Taiyo Yuden: NRG4026 series for 1.0 A outputs
? Sumida: CDH74 series for 1.5 A outputs
Output Capacitor In the interests of size, cost and perfor-
mance, it is highly recommended that ceramic X5R or X7R
capacitor types be used. When using ceramic capacitors another
important consideration is the E-field effects on the actual value
of the capacitor. To minimize the effects of the capacitance
reducing with output voltage, it is recommended that the working
voltage of the capacitor be considerably more than the set output
voltage. As a suggestion, it is recommended that 6.3 V-rated
capacitors should be used for output voltages of 3.3 V and below.
For output voltages of 5 V, a 10 V-rated capacitor should be used.
When using ceramic capacitors, there is generally no need to con-
sider the current carrying capability due to the negligible heating
effects of the ESR. Also, the rms current flowing into the output
capacitor is extremely low.
Input Capacitor Again it is highly recommended that ceramic,
X5R or X7R capacitors be used.
The value of the input capacitance determines the amount of
current ripple (EMI) that appears at the source (V BB supply)
terminals. The amounts of current flowing in and out of the input
capacitor depend on the relative impedances between the input
capacitor impedance and the source impedance. To achieve a low
impedance filter solution it is recommended to place at least two
capacitors in parallel.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10
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