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参数资料
| 型号： | 950220AFLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | 0.300 INCH, GREEN, MO-118, SSOP-48 |
| 文件页数： | 19/22页 |
| 文件大小： | 201K |
| 代理商： | 950220AFLFT |
6
Integrated
Circuit
Systems, Inc.
ICS950220
0467F—07/28/05
Byte 1: Output Control Register
(1 = enable, 0 = disable)
Byte 3: Output Control Register
(1 = enable, 0 = disable)
Byte 2: Output Control Register
(1 = enable, 0 = disable)
Byte 4: Output Control Register
(1 = enable, 0 = disable)
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Notes:
1. PWD = Power on Default
2. For disabled clocks, they stop low for single ended clocks. Differential CPU clocks stop with CPUCLKT at
high, CPUCLKC off, and external resistor termination will bring CPUCLKC low.
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