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| 型号： | 9301-01 |
| 厂商： | PEREGRINE SEMICONDUCTOR CORP |
| 元件分类： | 谐振器 |
| 英文描述： | 3.5 GHz Low Power CMOS Divide-by-2 Prescaler For RAD-Hard Applications |
| 中文描述： | PRESCALER, CDSO10 |
| 封装： | CERAMIC, SOIC-8 |
| 文件页数： | 2/7页 |
| 文件大小： | 229K |
| 代理商： | 9301-01 |
Product Specification
PE9301
Page 2 of 7
2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0039-02
│ UltraCMOS RFIC Solutions
Table 2. Pin Descriptions
Table 3. Absolute Maximum Ratings
Device Functional Considerations
The PE9301 takes an input signal frequency from
between 1.5 GHz to 3.5 GHz and produces an
output signal frequency half that of the supplied
input. In order for the prescaler to work properly,
several conditions need to be adhered to. It is
crucial that pin 3 be supplied with a bypass
capacitor to ground. In addition, the input and
output signals (pins 2 & 7, respectively) need to
be AC coupled via an external capacitor as shown
in Figure 5.
The ground pattern on the board should be made
as wide as possible to minimize ground
impedance.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS
devices are immune to latch-up.
Figure 3. Pin Configuration
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Pin No.
Pin
Name
Description
1
VDD
Power supply pin. Bypassing is required.
2
IN
Input signal pin. Should be coupled with a
capacitor (eg 15 pF).
3
DEC
Power supply decoupling pin. Place a
capacitor as close as possible and connect
directly to the ground plane.
4
GND
Ground pin. Ground pattern on the board
should be as wide as possible to reduce
ground impedance.
5
GND
Ground pin.
6
NC
No connection. This pin should be left
open.
7
OUT
Divided frequency output pin. This pin
should be coupled with a capacitor
(eg 47 pF).
8
GND
Ground Pin.
Symbol
Parameter/Conditions
Min
Max
Units
VDD
Supply voltage
4.0
V
TST
Storage temperature range
-65
150
°C
TOP
Operating temperature
range
-40
85
°C
VESD
ESD voltage (Human Body
Model)
250
V
PE9301
1
2
3
4
8
7
6
5
IN
GND
DEC
GND
OUT
VDD
NC
GND
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