参数资料
型号: 8545AGI-02LF
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: 8545 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
封装: 6.50 X 4.40 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-20
文件页数: 13/13页
文件大小: 668K
代理商: 8545AGI-02LF
ICS8545AGI-02 REVISION A JULY 29, 2009
9
2009 Integrated Device Technology, Inc.
ICS8545I-02 Data Sheet
LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER
Application Information
Recommendations for Unused Input and Output Pins
Inputs:
CLK Inputs
For applications not requiring the use of a clock input, it can be left
floating. Though not required, but for additional protection, a 1k
resistor can be tied from the CLK input to ground.
LVCMOS Control Pins
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional protection.
A 1k
resistor can be used.
Outputs:
LVDS Outputs
All unused LVDS output pairs can be either left floating or terminated
with 100
across. If they are left floating, there should be no trace
attached.
3.3V LVDS Driver Termination
A general LVDS interface is shown in Figure 2. In a 100
differential
transmission line environment, LVDS drivers require a matched load
termination of 100
across near the receiver input. For a multiple
LVDS outputs buffer, if only partial outputs are used, it is
recommended to terminate the unused outputs.
Figure 2. Typical LVDS Driver Termination
3.3V
LVDS Driver
R1
100
+
3.3V
50
50
100
Differential Transmission Line
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