参数资料
型号: 85411AMILFT
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: 85411 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
封装: 3.90 X 4.90 MM, 1.37 MM HEIGHT, ROHS COMPLIANT, SOIC-8
文件页数: 3/15页
文件大小: 287K
代理商: 85411AMILFT
IDT / ICS DIFFERENTIAL-TO-LVDS FANOUT BUFFER
11
ICS85411AMI REV. B JANUARY 20, 2009
ICS85411I
LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS85411I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS85411I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
DD
= 3.3V + 10% = 3.63V, which gives worst case results.
Power (core)
MAX
= V
DD_MAX
* I
DD_MAX
= 3.63V * 50mA = 181.5mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
TM devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 103.3°C/W per Table 5 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.182W * 103.3°C/W = 103.8°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and
the type of board (multi-layer).
TABLE 5. THERMAL RESISTANCE
θθθθθ
JA
FOR
8-LEAD SOIC, FORCED CONVECTION
θθθθθ
JA
by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
153.3°C/W
128.5°C/W
115.5°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
112.7°C/W
103.3°C/W
97.1°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
相关PDF资料
PDF描述
85424-001 12 CONTACT(S), FEMALE, RIGHT ANGLE TELECOM AND DATACOM CONNECTOR, SURFACE MOUNT, RECEPTACLE
8545AGI-02LF 8545 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
85460-001 12 CONTACT(S), FEMALE, RIGHT ANGLE TELECOM AND DATACOM CONNECTOR, SURFACE MOUNT, RECEPTACLE
85460-011 12 CONTACT(S), FEMALE, RIGHT ANGLE TELECOM AND DATACOM CONNECTOR, SURFACE MOUNT, RECEPTACLE
85460-012 12 CONTACT(S), FEMALE, RIGHT ANGLE TELECOM AND DATACOM CONNECTOR, SURFACE MOUNT, RECEPTACLE
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